ManyaJain.

I like breaking simple problems into complex ones, fixing those, and pretending that was the plan all along. Interested in systems, ML, and building things that only work on my computer.

Experience

B.Tech, Electronics & Communication

IIIT Hyderabad · Aug 2024 - Current

Jul 2026 – present · React, Astro, A/B testing, UX research

Research Assistant, ViLABs · IIIT Hyderabad

  • Building interactive online activities that teach STEM concepts, under Virtual Labs, a Ministry of Education (Govt. of India) initiative.
  • Running A/B experiments and analysing engagement data to improve learning outcomes and usability.

May – Jul 2026 · Medical vision-language models for clinical decision support

Research Intern · Tech Mahindra

  • Built multimodal medical AI systems combining clinical images, diagnostic reports and LLMs, with a Python and Pandas data pipeline.
  • Explored cross-modal attention to align imaging features with clinical text, and wrote up the methods and results.

Selected work

Software, systems & ML01 / 04
Jul 2026
C++17 · Linux · TUN/UDP

Noise-based UDP VPN

A VPN from scratch in the WireGuard style: Noise IK handshake with Curve25519, ChaCha20-Poly1305 on every packet, replay protection, automatic rekeying, and an epoll server for many clients.

Jun 2026
PyTorch · ViT · BioGPT

Radiology report generator

Turns chest X-rays into structured reports. Trained on 224k CheXpert images across 14 diseases and beat the published R2Gen baseline on the Indiana University benchmark.

AISEHack 2026
PyTorch · OpenCV

Flood detection from satellites

An Attention SAR-UNet with a ResNet34 encoder, CBAM and ASPP that segments flooded areas. Reached 0.483 mIoU with Focal+Dice loss and 8x test-time augmentation.

Feb 2026
C · UNIX

Linux shell

A UNIX shell from scratch with fork/exec, I/O redirection, pipelines, and bash-style job control with signal handling.

Hardware & ECE02 / 04
Verilog · RISC-V · RTL

32-bit RISC-V CPU

A complete 32-bit RISC-V processor implemented in synthesizable Verilog as a sequential multi-cycle datapath, integrating instruction fetch, decode, register operations, ALU execution, memory access, and control logic.

Analog · EMG · Servo · Signal Conditioning

EMG-controlled servo

An analog EMG acquisition and control system that captures low-amplitude muscle signals, and converts them into control signals for servo motor actuation without relying on digital processing.

Analog · Audio · Discrete BJT

5-stage audio amplifier

A five-stage discrete audio amplifier designed for high voltage gain across the 20 Hz–20 kHz audible band, using cascaded transistor stages for signal amplification, biasing, and output power delivery.

Toolbox

Wins & roles

Hackathon

AISEHack 2026: top 6% nationally, 18th of 300+ teams in flood detection.

Flipkart GRiD 8.0

Online semifinals, top 1,600 teams.

Events & Logistics Team Head · E-Cell, IIIT-H

Led a 10-member team running Megathon, Hyderabad's largest student-run hackathon, for 1,100+ participants.

Watched & loved

    Off duty

    DrawingSleepingHackathonsMovies & TV